Capgemini

Senior CAD Semiconductor Engineer

Capgemini

Brasov, Bucharest, Cluj-Napoca, Iasi, Timisoara, Romania (On-site)

Job Type Permanent
Experience Senior
Posted 3 weeks ago
On-site Senior Level

Mission:

Define, deploy, and maintain EDA tool flows and CAD infrastructure supporting semiconductor design and verification activities across full SoC lifecycle. Drive the evaluation, benchmarking, and integration of EDA tools (Cadence, Synopsys, Siemens EDA, Arteris) and associated flows to maximize productivity, reliability, and scalability. Own the engineering infrastructure environment (compute, storage, licensing, CI/CD, automation) required for advanced chip design workloads. Collaborate with design, verification, and physical implementation teams to ensure efficient, robust, and scalable tool usage. Explore and integrate AI/ML-based tooling and workflows to improve engineering productivity (automation, debugging, optimization, knowledge extraction). Ensure optimal trade-offs between performance, cost, scalability, and usability of the CAD environment. Act as a key technical interface between internal engineering teams, management, and EDA vendors. Provide regular reporting on tool performance, usage, and roadmap alignment.

Main Responsibilities:

  • Define, deploy, and maintain EDA flows for digital, mixed-signal, and verification activities (simulation, synthesis, P&R, DFT, signoff).
  • Evaluate, benchmark, and qualify new EDA tools, releases, and methodologies before production deployment.
  • Design and operate EDA infrastructure environments, including compute farms (Linux-based clusters), storage systems (NFS, distributed storage, backup/DR), and license servers (FlexLM/Flexera).
  • Develop and maintain automation frameworks for tool installation and configuration, regression and CI/CD pipelines, and resource provisioning and monitoring.
  • Implement and manage CI/CD pipelines (e.g., Jenkins, GitLab CI) for design and verification workflows.
  • Collaborate with engineering teams to optimize tool usage and flows, debug tool-related issues, and improve turnaround time and efficiency.
  • Maintain strong interaction with EDA vendors (Cadence, Synopsys, Siemens) for tool support, issue resolution, roadmap alignment, licensing strategy and capacity planning.
  • Define and enforce best practices and standards for CAD usage and tool flows.
  • Integrate AI-driven capabilities into engineering workflows, including LLM-assisted scripting and automation, AI-based log analysis, debug assistance, and workflow optimization.
  • Support security, compliance, and reliability requirements (e.g., ISO 27001 environments).

Technical Skills:

EDA / CAD Flow Expertise:

  • Strong experience with full EDA flows: simulation, synthesis, place & route, verification, DFT flows
  • Tools from Cadence, Synopsys, Siemens EDA (Mentor Graphics)
  • Tool validation, qualification, and deployment
  • Strong experience with EDA licensing systems (FlexLM/Flexera)
  • Tool versioning, release management, and regression validation
  • Good understanding of RTL design, verification flows, and physical design constraints
  • Knowledge in ISO26262, DO-254 is a plus

Infrastructure & Automation:

  • Strong experience in Linux-based compute farms for EDA workloads
  • Distributed storage systems (NFS, parallel/distributed FS)
  • CI/CD systems (Jenkins, GitLab CI or equivalent)
  • Scripting and automation: Python, Perl, Shell, TCL
  • Infrastructure-as-code and automation mindset
  • Experience with monitoring and performance optimization, backup, disaster recovery, high availability

AI / Modern Engineering Tooling:

  • Practical experience with AI/LLM-based tooling integration (e.g., Copilot, OpenAI, Gemini, Mistral)
  • Hybrid AI infrastructure (cloud + on-prem GPU environments)
  • Use cases such as workflow automation, debug assistance, knowledge retrieval (RAG), engineering productivity optimization

Additional Skills:

  • Object-oriented programming concepts
  • Familiarity with version control systems (Git, SVN, etc.)
  • DevOps practices and toolchains

Requirements:

Educational Background: Master's degree (or equivalent) in Microelectronics, Electrical Engineering, or related field

Required Experience:

  • 8–15+ years in CAD / EDA / semiconductor infrastructure
  • Proven experience in EDA tool deployment and flow ownership
  • Strong exposure to semiconductor design environments

What You'll Love About Working Here:

  • Collaborative and Inclusive Culture: Work alongside passionate engineers in a dynamic environment involving teams spread across different global locations.
  • Flexibility and Growth: Enjoy flexible working hours and access to a wide range of professional development opportunities, including training programs, learning platforms and certifications.
  • Comprehensive Benefits: Benefit from an attractive package including medical services, eye glasses coverage, Benefit online, meal tickets, Employee Assistance Program (covering financial, legal, and emotional matters), and the Employee Share Option Plan.

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