Senior Digital Designer

Job Description

• Lead functional specification development for advanced digital systems.
• Design and implement microarchitecture (uArch) for high-performance blocks.
• Perform RTL debugging, ensuring design correctness and efficiency.
• Run and analyze lint checks and CDC (Clock Domain Crossing) checks.
• Collaborate with verification, physical design, and architecture teams.
• Contribute to front-end synthesis and optimization.
• Support SoC-level integration and design.
• Apply power optimization techniques for energy-efficient designs.

Job Requirements

• 7+ years of hands-on experience in digital design.
• Strong knowledge of Verilog and/or VHDL.
• Familiarity with SystemVerilog is a plus.
• Experience with Cadence Genus, Synopsys Design Compiler (DC), or Fusion Compiler is a plus.
• Proven experience in RTL design, uArch development, and functional specifications.
• Deep understanding of linting tools, CDC methodologies, and debugging flows.
• Familiarity with synthesis tools and SoC design is a strong plus.
• Bachelor’s degree in EE, ECE, CE, CS, or a related field is required.
• MS or PhD highly desired.
• Excellent communication and collaboration skills.

Why You’ll Love Working With Us

• Work on innovative semiconductor products with real-world impact.
• Join a collaborative, forward-thinking engineering team.
• Enjoy a flexible work environment and competitive compensation.
• Access opportunities for technical leadership and career growth.